Toshiba’s New Switching Topology for AI-Powered DC-DC Converters

Solving the “Last Inch” of AI Power Delivery Problem

Modern SoC (System-On-Chip) integrated circuits require more and more power, and there is no indication that this will stop in the future.

In data centers, the latest graphics processing units (GPUs) and other AI chips, led by NVIDIA’s Hopper GPU and Blackwell’s upcoming GPU, which consume more than 1 kW, are driving up demand. The power consumed by even a single server tower is skyrocketing to more than 90 kW, from 15 to 30 kW. After electricity enters the data center from the grid but before it enters the processor, it flows through a power supply unit (PSU), which steps down the AC line voltage to a lower DC voltage that the server can handle.

But once it’s in the server, it becomes much harder to get all that power through the motherboard and to the point of load (PoL)—the so-called “last inch” of the power supply network (PDN)—so that the processor can perform at its best under dynamic load conditions. Toshiba and other industry leaders are scrambling to develop DC-DC converter ICs that can deliver the right power smoothly and efficiently.

We’re focusing on the voltage-regulator module (VRM)—a type of DC-DC converter that steps down the 12V DC output voltage from a power supply to support the processors and accelerators inside a server, which in many cases operate at less than 1V. As modern chips consume more power, the DC-DC converters in front of them must handle progressively larger load currents, sometimes rising to more than 1,000A. Incidentally, high currents increase conduction losses in the connections between them, Toshiba noted.

To reduce these losses, the technology industry is increasing the DC voltage used to transmit power to and within servers to 48V. For decades, the standard DC bus voltage used in data centers was 12V. Upgrading to 48V reduces the current required by a factor of four, because Ohm’s Law states that power equals current times voltage (P = I × V). Since power also equals resistance times current squared (P = R × I²), assuming a bus voltage of 48 V, reduces the I2R losses due to resistance on the power supply rails by a factor of 16.

A New Switching Topology for a New Era of Power Delivery

Minimizing power losses in data centers involves distributing power at higher voltages and lower currents, then reducing the voltage as close to the processor’s “core” voltage as possible. Toshiba and other players in the power semiconductor industry are trying to introduce more compact DC-DC converters that can reduce voltage from 48V to 1V very efficiently—so efficiently that any secondary steps between them can be cut out.

But it’s not that simple. In the case of the buck topology, managing 48V instead of 12V means that the width of the pulses — the pulse-width modulation (PWM) signals — that control the power switches at the heart of the DC-DC converter must be 4 times shorter, Toshiba said.

PWM works by rapidly changing the width of digital signals to produce the desired analog signal to control the operation of the power switch. It provides the ability to regulate the average output current and voltage that the power supply delivers to the load.

Reducing the width of the PWM signals increases the duty cycle of the DC-DC converter, which is crucial for converting input voltages as high as 48 V to output voltages as low as 1 V. The trade-off is that the switching speeds required to do this are much faster than usual.

So while the 48V DC bus reduces conduction losses, the faster switching required to use it inevitably causes buck-based DC-DC converters to suffer from higher switching losses. This cancels out any energy-efficiency gains, Toshiba said.

In most cases, transformers can be used in isolated power topologies to take care of the expansion of the duties. However, these components require a relatively large amount of space, which can add up in multiphase DC-DC converters, which are widely used to supply power to AI systems and other high-current loads with very fast response times. The switched capacitor topology eliminates transformers, but it comes with other drawbacks.

Another option is to use “hybrid” power supply topologies that use a combination of inductors and capacitors instead of transformers. These non-isolated DC-DC converters can take up 10X to 100X less space in a system, Toshiba said. The tradeoff is that they must be paired with many more high-frequency capacitors to increase the PWM duty cycle, leading to more congested pin wiring. More components also mean higher costs.

Toshiba’s Star-Delta Topology: The New “Star” Among DC-DC Converters?

Toshiba is addressing these shortcomings by developing a star-delta switching topology for non-isolated DC-DC converters, which was recently presented at the annual IEEE Symposium on VLSI Technology and Integrated Circuits.

The power topology connects the switching layers at the front end of the DC-DC converter, where the current is comparatively small, reducing the total number of capacitors required by almost half. In DC-DC converters, the switching “layers” are the divisions created by switching intermediate nodes.

In the standard hybrid power topology, there are eight equally divided switching layers that step down the 48V input by 6V at a time. The buck topology, on the other hand, requires a single switching layer with the input voltage switching amplitude.