SiFive Unveils RISC-V Design for High-Performance AI Workloads

SiFive, a company that designs integrated circuits based on the RISC-V computing platform, has announced a series of new AI integrated circuits designed for high-performance tasks.

The SiFive Intelligence XM Series is designed to accelerate high-performance AI workloads. It is SiFive’s first intellectual property featuring a highly scalable AI array engine that accelerates time-to-market for semiconductor companies building system-on-chip solutions for IoT at the edge, consumer devices, next-generation electric and/or autonomous vehicles, data centers, and more.

As part of its plan to support customers and the broader RISC-V ecosystem, SiFive also announced its intention to open source a reference implementation of its SiFive Kernel Library (SKL).

The announcement was made during a SiFive press conference held Tuesday in Santa Clara, where company executives discussed the leading role RISC-V is playing in AI solutions at many leading companies, as well as SiFive’s strategy, roadmap and business dynamics.

Open solution

Patrick Little, CEO of SiFive, told VentureBeat that customers across the semiconductor, systems, and consumer markets have appreciated the software strategy that underpins SiFive and RISC-V.

He noted that products with more than 10 billion SiFive cores have been shipped to date. Little noted that SiFive has invested more than $500 million in research and development and sells to leading semiconductor leaders and hyperscalers. The company has more than 400 design wins.

The RISC-V architecture has software that is an open standard interface, meaning any type of core that connects to it can be used. That means customers using SiFive designs can choose their own accelerators for AI and other applications without having to worry about breaking software compatibility, Little said.

While large AI leaders like Nvidia may use their own proprietary graphics processing unit (GPU) architectures, smaller companies use their own type of accelerators, he said. But software developers don’t want to have to learn a new language every time a new accelerator comes out, Little said. That’s why hyperscale and chip companies want to use RISC-V solutions like SiFive so they don’t have to constantly rewrite their software, he said.

The open software interface of the RISC-V standard allows for the smooth evolution of the RISC-V standard over time and reduces the risk of a solution that is beyond the scope of a single proprietary vendor.

SiFive has been steadily climbing the food chain, starting in the 90s with embedded cores and adding its first vector processor in 2021. And now it’s adding AI solutions. Customers can use it as a dataflow processor on the front end of their processor to work with evolving AI accelerators on the back end.

“They don’t want to keep writing to AI software. So we put a RISC-V vector processor in front of it. AI processors are changing rapidly. Models are changing. Software developers want to write to something that will exist 15 years from now,” he said. “We’re one of the few companies that can fill that gap. And today we announced our own accelerator or matrix multiplication engine and we’re building the XM product line to complete what we did in vector processing. It’s a matrix multiplication engine.”

Customers who want an alternative to Nvidia may turn to another source but don’t want the competitor to be another proprietary solution. Instead, they like RISC-V because it has a lot of offerings from competitors behind it, Little said.

“We are confident that our solution can achieve performance on par with Nvidia solutions,” he said.

“Many companies are seeing the benefits of an open processor standard as they race to keep up with the rapid pace of change in AI. AI leverages SiFive’s strengths, including performance per watt and our unique ability to help customers customize their solutions,” Little said. “We already ship our RISC-V solutions to five of the Great 7 companies, and as companies transition to a software-first design strategy, we’re working on new AI solutions with a wide range of companies, from automotive to data centers, the intelligent edge, and IoT.”

SiFive’s new XM series offers an extremely scalable and efficient AI compute engine. By integrating scalar, vector, and matrix engines, XM series customers can take advantage of very efficient memory bandwidth. The XM series also continues SiFive’s tradition of delivering extremely high performance per watt for compute-intensive applications.

“RISC-V was originally designed to efficiently support specialized compute engines, including mixed-precision operations,” said Krste Asanovic, SiFive’s lead architect, in a statement. “This, combined with the inclusion of efficient vector instructions and support for specialized AI extensions, are the reasons why many of the largest data center companies have already adopted RISC-V AI accelerators.”

As part of his presentation, Asnovic provided more details on the new XM series, which expands the Intelligence product family. The XM series also continues the SiFive tradition of delivering extremely high performance per watt for compute-intensive applications.

With four X-cores per cluster, the cluster can deliver 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. The chip has 1 TB/s of sustained memory bandwidth per XM Series cluster, with clusters able to access memory via a high-bandwidth port or CHI port for consistent memory access. SiFive envisions systems without a host processor or based on RISC-V, x86, or Arm. The company is currently testing its solutions.

SiFive will be at RISC-V Summit North America, October 22-23, 2024, in Santa Clara, California. The company employs 500 people.

“We’ve become the gold standard for RISC-V,” Little said.